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VLSI超大规模集成电路测试和验证的发展趋势

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作者:贾建革, 段新安, 李咏雪

作者单位:总后卫生部药品仪器检验所, 北京 100071


关键词:嵌入测试; 测试源; 接收器; 差错; 大规模芯片


摘要:

随着深亚微米级材料的应用,VLSI器件进一步推动了半导体技术领域的发展,传统的测试和验证方法已不能满足需要且成本较高,基于Core的系统级芯片要求芯片设计者必须改变以往的开发方式,以便缩短上市时间,扩大销售额。一种嵌入式的测试方法应运而生,它能使芯片设计者在较短的时间内生产出高质量的产品,提高利润、增加市场知名度,且大大减少了系统验证、检测和调试的时间。本文着重讨论嵌入测试技术,分析该技术对产品的上市时间、产品质量以及生产成本所带来的影响。


Emerging trends in VLSI test and diagnosis

JIAa Jian-ge, DUAN Xin-an, LI Yong-xue

Institute for Drug and Instrument Control of Health Dept GLD of PLA, Beijing 100071, China

Abstract: As the move to very deep submicron VLSI devices pushes the threshold of semiconductor technology, conventional test and diagnosis methods become inadequate and costly. The new level of complexity driven by core-based system-chips demands that designers alter the way they approach chip development in order to keep up with diminishing time-to-market requirements and stay within budgets. Embedded test enables the production of high-quality devices in less time. The use of embedded test raises margins and significantly reduces the required for system verification, test and debug. This paper addresses discusses embedded test technology and analyzes its impact on time-to-market, product quality and cost.

Keywords: Embedded test; Test souree; Sink; Defect; Monster chip

2005, 31(6): 94-96  收稿日期: 2005-1-25;收到修改稿日期: 2005-4-17

基金项目: 

作者简介: 贾建革(1966-),女,高级工程师,主要从事超大规模集成电路测试方法研究。

参考文献

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